Description:

VL82C205 PC/AT-Compatible Page Mode Access Controller

The VL82C205 is a page-mode memory controller for the VLSI, VL82CPCAT-16 and CL82CPCAT-20, 16/20 MHz PC/AT-compatible chip set. This chip in addition to the other five chips from the VLSI chip sets, allows page-mode memory cycles to be run, allowing a 16 MHz processor to use standard 100 ns DRAMs and still have only 0.6 wait states during DRAM read accesses.

When using page-mode, accesses that are within 521 words of the last access are performed with zero wait states, accesses that are outside that range are performed in two wait states.

• Supports 16 MHz 80286 operation with 100 ns DRAMs
• Supports page-mode DRAM access for PC/AT-compatible systems
• Speed upgrades to 20 MHz
• Companion to VL82CPCAT-16 and VL82CPCAT-20, 16/20 MHz PC/AT-compatible chip sets
• 13 chip PC/AT implementation (non-memory chips)
• 0.6 wait state operation during DRAM read accesses
• Low power CMOS technology
• 68-pin PLCC package