Description:

Overview

The VL82C481 controller is designed to control 486DX or 486SX/487SX-based ISA bus systems operating at up to 40 MHz. It also supports 486 family CPUs that contain an integrated write-back cache (P24T, etc.)

The VL82C481 replaces the following devices on the motherboard:

• Two 82C37A DMA controllers
• Two 82C59A interrupt controllers
• 82C54 timer
• 74LS612 memory mapper
• 82284 clock generator and ready interface
• 82288 bus controller

The following controller blocks are also included on-chip:

• Memory/refresh controller
• Port B and NMI logic
• Bus steering logic
• Turbo Mode control logic
• Parity checking logic
• Parity generation logic
• Writ-back look-aside cache controller

In addition to the VL82C114 Combination I/O the additional configurations have been found:

• VL82C481 + VL82C113A
• VL82C481 + 721 I/O support
• VL82C481 + SMC 665 I/O support

Differences to the VL82C480:

• Includes full support for CPU's with internal write-back cache (P24T, etc.)
• Comprehensive VESA VL-Bus support
• Optional keyboard command blocking for fast A20GATE and CPU reset
• Perform 3-2-2-2 cycle reads for support of slower SRAMs at higher frequences.

Documented parts

• VLSI VL82C114 (Combination I/O)
• VLSI VL82C481 (System/Cache/ISA bus Controller)