Overview

The HiD/386 Chipset, 82C381 and 82C382D, support high integration implementations of Direct Mapped Cache with 32KB/64KB/128KB Cache for 25 and 33 MHz 386/AT Personal Computers. Combined with the 82C206 Integrated Peripherals Controller, it integrates the 386/AT motherboard to under 20 devices, plus memory. It is designed to cost reduce discrete and CHIPS CS8230 based 82385 Cache 386/AT designs, as well as boost the performance of these designs to 33 MHz, with >64KB Cache.

The HiD/AT chipset is compatible with the 82C206 Integrated Peripherals Controller. Consequently, with the 82C206, a very high integration and very high performance 386/AT can be implemented. A typical motherboard can be designed with less than 20 devices plus memory.

For larger AT designs, targeted at file-servers and departmental computers, designs with 8 or more slots can be supported with external AT bus drivers.

Features:

100% IBM PC/AT Compatible 386/AT Chipset for 25 and 33 MHz systems
Designed to provide the most cost-effective, high performance Cache based 386/AT with high integration
Advanced Memory Controller design
- Direct support for 64KB, 128KB and larger cache subsystems
- Implements sophisticated DRAM Controller with Paging in odd banks and 2/4 way Page Interleaving with even banks
- BIOS Shadow Ram
- 256K Relocation to top of Memory
- Non-Cacheable programmable memory regions, and GateA20 support
Software configurable Command Delays, Wait States and Memory Organization
Synchronous AT Bus Clock with programmable CPU Clock divide options: by 2, by 3 and by 4
Complete AT/386 system board requires only 20 components plus memory
Single EPROM configuration
Targeted at very high performance 32-bit power PCs and file-server designs
Low power, high speed 1.2u CMOS Technology