ACC Micro 83000 (MCA Model 30 Integrated Chip Set)
Chipset parts
Release date
1988-01-01
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Description:
General
The ACC 83000 chip set is designed for system designers to build 100% compatible IBM PS/2 Model 30 systems. The ACC 83000 contains two VLSI chips.
The ACC 3100 provides system control signals, and the ACC 3000 is the I/O controller. The ACC 83000 supports a local CPU bus, a system memory bus, and compatible Model 30 buses. The system clock generates 24, 8 and 1.84 MHz clock timing. Up to eight I/O channel interrupts with sharing capability are available with variable wait states.
- 100% IBM PS/2 Model 30 system support gate array pin to pin compatible
- 100% IBM PS/2 Model 30 I/O support gate array pin to pin compatible
- Bus and memory controllers
- Supports up to 8 channel interrupts with sharing capability
- Wait state generator
- System clock
- Built-in mouse and keyboard interface
- Decoder and data bus controller
- NMI control and peripheral logic
- Parallel port control
- 1.5 micron high performance CMOS technology
- 84-L PLCC package
Last updated 2023-05-15T21:20:24Z
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