Overview

Found on the model 50 and 60. The model 60 includes an additional chip (72X8287ESD). It supports 10MHz operation. It is very similar to the Model 80 T1-T2 chipset. There the 72X7385 (Bus controller) has been replaced with discrete logic and 2x 8259A-2 (Programmable Interrupt Controllers). Speculation: the 72X7385 contains two 8259A-2s.

72X7377 DMA:

No datasheet exists for this chip. Also sometimes labeled 72X7377ESD.

72X7385 Bus controller:

No datasheet exists for this chip.

72X8299 I/O controller:

No datasheet exists for this chip.

72X8287ESD:

No datasheet exists for this chip. It is only found on the PS/2 Model 60. It is absent on the model 50.

It likely has something to do with the additional MCA slots. However this is just conjecture. (mR_Slug)

15F7917

No datasheet exists for this chip. It is only found in the P75 motherboard. It is manufactured by OKI and is likely a gate array programmed at the factory by IBM.

Intel 8042AH Keyboard Controller:

mR_Slug notes:

This is the Intel UPI-42 (Universal Peripheral Interface 8042AH) programed as a keyboard controller and additional functions. It was released around '87. The 8042AH is a ROM mask (programmed at the factory). It is pin compatible with the 8042 and EPROM based 8742AH.

An 8042AH will NOT function as a keyboard controller UNLESS it is programed to do so. Programs can differ between 8042AH's. In this application, for FULL OPERATION in a motherboard the program MUST be correct. Typically, swapping an 8042AH from a PC to another, will often provide a functional keyboard, the additional functions may not work. It may be labeled as 'Keyboard BIOS'. Using an 8042AH programmed for some other (non-PC) application will NOT work.

Intel 8042AH Universal Peripheral Interface:

The Intel UPI-42 is a general-purpose Universal Peripheral Interfaces that allow the designer to develop customized solutions for peripheral device control.

They are essentially "slave" microcontrollers, or microcontrollers with a slave interface included on the chip. Interface registers are included to enable the UPI device to function as a slave peripheral controller in the MCS Modules and iAPX family, as well as other 8-, 16-bit systems.

To allow full user flexibility, the program memory is available in ROM, One-Time Programmable EPROM (OTP) and UV-erasable EPROM. All UPI-42 devices are fully pin compatible for easy transition from prototype to production level designs, These are the memory configurations available.

UPI Device ROM EPROM RAM Programming Voltage 8042AH 2K - 256 - 8742AH - 2K 256 12.5V

• UPI-42: 12 MHz
• Pin, Software and Architecturally Compatible with all UPI-41 and UPI-42 Products
• 8-Bit CPU plus ROM/EPROM, RAM, I/O, Timer/Counter and Clock in a Single Package
• 2048 x 8 ROM/EPROM, 256 x 8 RAM on UPI-42, 8-Bit Timer/Counter, 18 Programmable I/O Pins
• One 8-Bit Status and Two Data Registers for Asynchronous Siave-to-Master Interface
• DMA, Interrupt, or Polled Operation Supported
• Fully Compatible with all Intel and Most Other Microprocessor Families
• Interchangeable ROM and EPROM Versions
• Expandable I/O
• Sync Mode Available
• Over 90 Instructions: 70% Single Byte
• Available in EXPRESS
  • Standard Temperature Range
• Intelligent Programming Algorithm
  • Fast EPROM Programming
• Available in 40-Lead CERDIP, 40-Lead Plastic and 44-Lead Plastic Leaded Chip Carrier Packages